Variables
int	RF_RST_REG = 48

int	FPGA_IRIS030_WR_AGC_ENABLE_FLAG = 232

int	FPGA_IRIS030_WR_AGC_RESET_FLAG = 236

int	FPGA_IRIS030_WR_IQ_THRESH = 240

int	FPGA_IRIS030_WR_NUM_SAMPS_SAT = 244

int	FPGA_IRIS030_WR_MAX_NUM_SAMPS_AGC = 248

int	FPGA_IRIS030_WR_RSSI_TARGET = 252

int	FPGA_IRIS030_WR_WAIT_COUNT_THRESH = 256

int	FPGA_IRIS030_WR_AGC_SMALL_JUMP = 260

int	FPGA_IRIS030_WR_AGC_BIG_JUMP = 264

int	FPGA_IRIS030_WR_AGC_TEST_GAIN_SETTINGS = 268

int	FPGA_IRIS030_WR_AGC_LNA_IN = 272

int	FPGA_IRIS030_WR_AGC_TIA_IN = 276

int	FPGA_IRIS030_WR_AGC_PGA_IN = 280

int	FPGA_IRIS030_RD_MEASURED_RSSI = 284

int	FPGA_IRIS030_WR_PKT_DET_THRESH = 288

int	FPGA_IRIS030_WR_PKT_DET_NUM_SAMPS = 292

int	FPGA_IRIS030_WR_PKT_DET_ENABLE = 296

int	FPGA_IRIS030_WR_PKT_DET_NEW_FRAME = 300

int	FPGA_IRIS030_WR_AGC_ATTN_IN = 304

int	FPGA_IRIS030_WR_AGC_LNA1_IN = 308

int	FPGA_IRIS030_WR_AGC_LNA2_IN = 312

int	FPGA_IRIS030_WR_AGC_GAIN_INIT = 316

int	FPGA_IRIS030_WR_NUM_SAT_STAGES = 320

int	FPGA_IRIS030_WR_NUM_FINE_STAGES = 324

Variable Documentation

◆ FPGA_IRIS030_RD_MEASURED_RSSI

int macros.FPGA_IRIS030_RD_MEASURED_RSSI = 284

◆ FPGA_IRIS030_WR_AGC_ATTN_IN

int macros.FPGA_IRIS030_WR_AGC_ATTN_IN = 304

◆ FPGA_IRIS030_WR_AGC_BIG_JUMP

int macros.FPGA_IRIS030_WR_AGC_BIG_JUMP = 264

◆ FPGA_IRIS030_WR_AGC_ENABLE_FLAG

int macros.FPGA_IRIS030_WR_AGC_ENABLE_FLAG = 232

◆ FPGA_IRIS030_WR_AGC_GAIN_INIT

int macros.FPGA_IRIS030_WR_AGC_GAIN_INIT = 316

◆ FPGA_IRIS030_WR_AGC_LNA1_IN

int macros.FPGA_IRIS030_WR_AGC_LNA1_IN = 308

◆ FPGA_IRIS030_WR_AGC_LNA2_IN

int macros.FPGA_IRIS030_WR_AGC_LNA2_IN = 312

◆ FPGA_IRIS030_WR_AGC_LNA_IN

int macros.FPGA_IRIS030_WR_AGC_LNA_IN = 272

◆ FPGA_IRIS030_WR_AGC_PGA_IN

int macros.FPGA_IRIS030_WR_AGC_PGA_IN = 280

◆ FPGA_IRIS030_WR_AGC_RESET_FLAG

int macros.FPGA_IRIS030_WR_AGC_RESET_FLAG = 236

◆ FPGA_IRIS030_WR_AGC_SMALL_JUMP

int macros.FPGA_IRIS030_WR_AGC_SMALL_JUMP = 260

◆ FPGA_IRIS030_WR_AGC_TEST_GAIN_SETTINGS

int macros.FPGA_IRIS030_WR_AGC_TEST_GAIN_SETTINGS = 268

◆ FPGA_IRIS030_WR_AGC_TIA_IN

int macros.FPGA_IRIS030_WR_AGC_TIA_IN = 276

◆ FPGA_IRIS030_WR_IQ_THRESH

int macros.FPGA_IRIS030_WR_IQ_THRESH = 240

◆ FPGA_IRIS030_WR_MAX_NUM_SAMPS_AGC

int macros.FPGA_IRIS030_WR_MAX_NUM_SAMPS_AGC = 248

◆ FPGA_IRIS030_WR_NUM_FINE_STAGES

int macros.FPGA_IRIS030_WR_NUM_FINE_STAGES = 324

◆ FPGA_IRIS030_WR_NUM_SAMPS_SAT

int macros.FPGA_IRIS030_WR_NUM_SAMPS_SAT = 244

◆ FPGA_IRIS030_WR_NUM_SAT_STAGES

int macros.FPGA_IRIS030_WR_NUM_SAT_STAGES = 320

◆ FPGA_IRIS030_WR_PKT_DET_ENABLE

int macros.FPGA_IRIS030_WR_PKT_DET_ENABLE = 296

◆ FPGA_IRIS030_WR_PKT_DET_NEW_FRAME

int macros.FPGA_IRIS030_WR_PKT_DET_NEW_FRAME = 300

◆ FPGA_IRIS030_WR_PKT_DET_NUM_SAMPS

int macros.FPGA_IRIS030_WR_PKT_DET_NUM_SAMPS = 292

◆ FPGA_IRIS030_WR_PKT_DET_THRESH

int macros.FPGA_IRIS030_WR_PKT_DET_THRESH = 288

◆ FPGA_IRIS030_WR_RSSI_TARGET

int macros.FPGA_IRIS030_WR_RSSI_TARGET = 252

◆ FPGA_IRIS030_WR_WAIT_COUNT_THRESH

int macros.FPGA_IRIS030_WR_WAIT_COUNT_THRESH = 256

◆ RF_RST_REG

int macros.RF_RST_REG = 48

Variables